1. Field of the Invention
The present invention relates to the manufacture of semiconductor devices, and more particularly, to a method for forming isolation trenches on a semiconductor substrate.
2. Description of Related Art
There are two basic methods for separating active areas on a semiconductor substrate: the LOCOS (localized oxidation of silicon) method, and trench isolation. However, with the increasing complexity of semiconductor devices and shrinking dimensions of the same, trench isolation is emerging as the standard method of separating active areas on the semiconductor substrate.
In trench isolation, however, the insulation layer on the sidewalls of the trenches is removed by errors made in the etching process. This results in the exposure of the semiconductor substrate. When this happens, if voltage is applied to a gate electrode after the forming of a semiconductor device such as a transistor, the electric field formed on the semiconductor substrate becomes distorted, or the leakage of current occurs. This is the so-called "corners" effect.
In an attempt to overcome these drawbacks, U.S. Pat. No. 5,433,794, herein incorporated by reference in its entirety, discloses a method in which spacers are used to form isolation trenches with improved corners. Namely, a spacer is formed around the periphery of the trench, and the spacer is then combined with isolation material disposed in the trench to form a dome-like structure over the trench. The resulting structure extends over the peripheral edges of the trench, thereby overcoming the above described problems.
However, in such a conventional method, since the spacer is formed around the periphery of the trench area, the integration of the element is difficult and the possibility of the occurrence of mis-alignment increases.